SPI Master driver

Overview

The ESP32 has four SPI peripheral devices, called SPI0, SPI1, HSPI and VSPI. SPI0 is entirely dedicated to the flash cache the ESP32 uses to map the SPI flash device it is connected to into memory. SPI1 is connected to the same hardware lines as SPI0 and is used to write to the flash chip. HSPI and VSPI are free to use. SPI1, HSPI and VSPI all have three chip select lines, allowing them to drive up to three SPI devices each as a master. The SPI peripherals also can be used in slave mode, driven from another SPI master.

The spi_master driver

The spi_master driver allows easy communicating with SPI slave devices, even in a multithreaded environment. It fully transparently handles DMA transfers to read and write data and automatically takes care of multiplexing between different SPI slaves on the same master

Terminology

The spi_master driver uses the following terms:

  • Host: The SPI peripheral inside the ESP32 initiating the SPI transmissions. One of SPI, HSPI or VSPI. (For now, only HSPI or VSPI are actually supported in the driver; it will support all 3 peripherals somewhere in the future.)
  • Bus: The SPI bus, common to all SPI devices connected to one host. In general the bus consists of the miso, mosi, sclk and optionally quadwp and quadhd signals. The SPI slaves are connected to these signals in parallel.
    • miso - Also known as q, this is the input of the serial stream into the ESP32
    • mosi - Also known as d, this is the output of the serial stream from the ESP32
    • sclk - Clock signal. Each data bit is clocked out or in on the positive or negative edge of this signal
    • quadwp - Write Protect signal. Only used for 4-bit (qio/qout) transactions.
    • quadhd - Hold signal. Only used for 4-bit (qio/qout) transactions.
  • Device: A SPI slave. Each SPI slave has its own chip select (CS) line, which is made active when a transmission to/from the SPI slave occurs.
  • Transaction: One instance of CS going active, data transfer from and/or to a device happening, and CS going inactive again. Transactions are atomic, as in they will never be interrupted by another transaction.

SPI transactions

A transaction on the SPI bus consists of five phases, any of which may be skipped:

  • The command phase. In this phase, a command (0-16 bit) is clocked out.
  • The address phase. In this phase, an address (0-64 bit) is clocked out.
  • The read phase. The slave sends data to the master.
  • The write phase. The master sends data to the slave.

In full duplex, the read and write phases are combined, causing the SPI host to read and write data simultaneously.

The command and address phase are optional in that not every SPI device will need to be sent a command and/or address. Tis is reflected in the device configuration: when the command_bits or data_bits fields are set to zero, no command or address phase is done.

Something similar is true for the read and write phase: not every transaction needs both data to be written as well as data to be read. When rx_buffer is NULL (and SPI_USE_RXDATA) is not set) the read phase is skipped. When tx_buffer is NULL (and SPI_USE_TXDATA) is not set) the write phase is skipped.

Using the spi_master driver

  • Initialize a SPI bus by calling spi_bus_initialize. Make sure to set the correct IO pins in the bus_config struct. Take care to set signals that are not needed to -1.
  • Tell the driver about a SPI slave device conencted to the bus by calling spi_bus_add_device. Make sure to configure any timing requirements the device has in the dev_config structure. You should now have a handle for the device, to be used when sending it a transaction.
  • To interact with the device, fill one or more spi_transaction_t structure with any transaction parameters you need. Either queue all transactions by calling spi_device_queue_trans, later quering the result using spi_device_get_trans_result, or handle all requests synchroneously by feeding them into spi_device_transmit.
  • Optional: to unload the driver for a device, call spi_bus_remove_device with the device handle as an argument
  • Optional: to remove the driver for a bus, make sure no more drivers are attached and call spi_bus_free.

Transaction data

Normally, data to be transferred to or from a device will be read from or written to a chunk of memory indicated by the rx_buffer and tx_buffer members of the transaction structure. The SPI driver may decide to use DMA for transfers, so these buffers should be allocated in DMA-capable memory using pvPortMallocCaps(size, MALLOC_CAP_DMA).

Sometimes, the amount of data is very small making it less than optimal allocating a separate buffer for it. If the data to be transferred is 32 bits or less, it can be stored in the transaction struct itself. For transmitted data, use the tx_data member for this and set the SPI_USE_TXDATA flag on the transmission. For received data, use rx_data and set SPI_USE_RXDATA. In both cases, do not touch the tx_buffer or rx_buffer members, because they use the same memory locations as tx_data and rx_data.

Application Example

Display graphics on the ILI9341-based 320x240 LCD: peripherals/spi_master.

API Reference

Macros

SPI_DEVICE_TXBIT_LSBFIRST (1<<0)

Transmit command/address/data LSB first instead of the default MSB first.

SPI_DEVICE_RXBIT_LSBFIRST (1<<1)

Receive data LSB first instead of the default MSB first.

SPI_DEVICE_BIT_LSBFIRST (SPI_TXBIT_LSBFIRST|SPI_RXBIT_LSBFIRST);

Transmit and receive LSB first.

SPI_DEVICE_3WIRE (1<<2)

Use spiq for both sending and receiving data.

SPI_DEVICE_POSITIVE_CS (1<<3)

Make CS positive during a transaction instead of negative.

SPI_DEVICE_HALFDUPLEX (1<<4)

Transmit data before receiving it, instead of simultaneously.

SPI_DEVICE_CLK_AS_CS (1<<5)

Output clock on CS line if CS is active.

SPI_TRANS_MODE_DIO (1<<0)

Transmit/receive data in 2-bit mode.

SPI_TRANS_MODE_QIO (1<<1)

Transmit/receive data in 4-bit mode.

SPI_TRANS_MODE_DIOQIO_ADDR (1<<2)

Also transmit address in mode selected by SPI_MODE_DIO/SPI_MODE_QIO.

SPI_TRANS_USE_RXDATA (1<<2)

Receive into rx_data member of spi_transaction_t instead into memory at rx_buffer.

SPI_TRANS_USE_TXDATA (1<<3)

Transmit tx_data member of spi_transaction_t instead of data at tx_buffer. Do not set tx_buffer when using this.

Type Definitions

typedef struct spi_device_t *spi_device_handle_t

Handle for a device on a SPI bus.

Enumerations

enum spi_host_device_t

Enum with the three SPI peripherals that are software-accessible in it.

Values:

SPI_HOST =0

SPI1, SPI.

HSPI_HOST =1

SPI2, HSPI.

VSPI_HOST =2

SPI3, VSPI.

Structures

struct spi_transaction_t

This structure describes one SPI transaction

Public Members

uint32_t flags

Bitwise OR of SPI_TRANS_* flags.

uint16_t command

Command data. Specific length was given when device was added to the bus.

uint64_t address

Address. Specific length was given when device was added to the bus.

size_t length

Total data length, in bits.

size_t rxlength

Total data length received, if different from length. (0 defaults this to the value of length)

void *user

User-defined variable. Can be used to store eg transaction ID.

const void *tx_buffer

Pointer to transmit buffer, or NULL for no MOSI phase.

uint8_t tx_data[4]

If SPI_USE_TXDATA is set, data set here is sent directly from this variable.

void *rx_buffer

Pointer to receive buffer, or NULL for no MISO phase.

uint8_t rx_data[4]

If SPI_USE_RXDATA is set, data is received directly to this variable.

struct spi_bus_config_t

This is a configuration structure for a SPI bus.

You can use this structure to specify the GPIO pins of the bus. Normally, the driver will use the GPIO matrix to route the signals. An exception is made when all signals either can be routed through the IO_MUX or are -1. In that case, the IO_MUX is used, allowing for >40MHz speeds.

Public Members

int mosi_io_num

GPIO pin for Master Out Slave In (=spi_d) signal, or -1 if not used.

int miso_io_num

GPIO pin for Master In Slave Out (=spi_q) signal, or -1 if not used.

int sclk_io_num

GPIO pin for Spi CLocK signal, or -1 if not used.

int quadwp_io_num

GPIO pin for WP (Write Protect) signal which is used as D2 in 4-bit communication modes, or -1 if not used.

int quadhd_io_num

GPIO pin for HD (HolD) signal which is used as D3 in 4-bit communication modes, or -1 if not used.

struct spi_device_interface_config_t

This is a configuration for a SPI slave device that is connected to one of the SPI buses.

Public Members

uint8_t command_bits

Amount of bits in command phase (0-16)

uint8_t address_bits

Amount of bits in address phase (0-64)

uint8_t dummy_bits

Amount of dummy bits to insert between address and data phase.

uint8_t mode

SPI mode (0-3)

uint8_t duty_cycle_pos

Duty cycle of positive clock, in 1/256th increments (128 = 50%/50% duty). Setting this to 0 (=not setting it) is equivalent to setting this to 128.

uint8_t cs_ena_pretrans

Amount of SPI bit-cycles the cs should be activated before the transmission (0-16). This only works on half-duplex transactions.

uint8_t cs_ena_posttrans

Amount of SPI bit-cycles the cs should stay active after the transmission (0-16)

int clock_speed_hz

Clock speed, in Hz.

int spics_io_num

CS GPIO pin for this device, or -1 if not used.

uint32_t flags

Bitwise OR of SPI_DEVICE_* flags.

int queue_size

Transaction queue size. This sets how many transactions can be ‘in the air’ (queued using spi_device_queue_trans but not yet finished using spi_device_get_trans_result) at the same time.

transaction_cb_t pre_cb

Callback to be called before a transmission is started. This callback is called within interrupt context.

transaction_cb_t post_cb

Callback to be called after a transmission has completed. This callback is called within interrupt context.

Functions

esp_err_t spi_bus_initialize(spi_host_device_t host, spi_bus_config_t *bus_config, int dma_chan)

Initialize a SPI bus.

Warning
For now, only supports HSPI and VSPI.
Return
  • ESP_ERR_INVALID_ARG if configuration is invalid
  • ESP_ERR_INVALID_STATE if host already is in use
  • ESP_ERR_NO_MEM if out of memory
  • ESP_OK on success
Parameters
  • host: SPI peripheral that controls this bus
  • bus_config: Pointer to a spi_bus_config_t struct specifying how the host should be initialized
  • dma_chan: Either 1 or 2. A SPI bus used by this driver must have a DMA channel associated with it. The SPI hardware has two DMA channels to share. This parameter indicates which one to use.

esp_err_t spi_bus_free(spi_host_device_t host)

Free a SPI bus.

Warning
In order for this to succeed, all devices have to be removed first.
Return
  • ESP_ERR_INVALID_ARG if parameter is invalid
  • ESP_ERR_INVALID_STATE if not all devices on the bus are freed
  • ESP_OK on success
Parameters
  • host: SPI peripheral to free

esp_err_t spi_bus_add_device(spi_host_device_t host, spi_device_interface_config_t *dev_config, spi_device_handle_t *handle)

Allocate a device on a SPI bus.

This initializes the internal structures for a device, plus allocates a CS pin on the indicated SPI master peripheral and routes it to the indicated GPIO. All SPI master devices have three CS pins and can thus control up to three devices.

Return
  • ESP_ERR_INVALID_ARG if parameter is invalid
  • ESP_ERR_NOT_FOUND if host doesn’t have any free CS slots
  • ESP_ERR_NO_MEM if out of memory
  • ESP_OK on success
Parameters
  • host: SPI peripheral to allocate device on
  • dev_config: SPI interface protocol config for the device
  • handle: Pointer to variable to hold the device handle

esp_err_t spi_bus_remove_device(spi_device_handle_t handle)

Remove a device from the SPI bus.

Return
  • ESP_ERR_INVALID_ARG if parameter is invalid
  • ESP_ERR_INVALID_STATE if device already is freed
  • ESP_OK on success
Parameters
  • handle: Device handle to free

esp_err_t spi_device_queue_trans(spi_device_handle_t handle, spi_transaction_t *trans_desc, TickType_t ticks_to_wait)

Queue a SPI transaction for execution.

Return
  • ESP_ERR_INVALID_ARG if parameter is invalid
  • ESP_OK on success
Parameters
  • handle: Device handle obtained using spi_host_add_dev
  • trans_desc: Description of transaction to execute
  • ticks_to_wait: Ticks to wait until there’s room in the queue; use portMAX_DELAY to never time out.

esp_err_t spi_device_get_trans_result(spi_device_handle_t handle, spi_transaction_t **trans_desc, TickType_t ticks_to_wait)

Get the result of a SPI transaction queued earlier.

This routine will wait until a transaction to the given device (queued earlier with spi_device_queue_trans) has succesfully completed. It will then return the description of the completed transaction so software can inspect the result and e.g. free the memory or re-use the buffers.

Return
  • ESP_ERR_INVALID_ARG if parameter is invalid
  • ESP_OK on success
Parameters
  • handle: Device handle obtained using spi_host_add_dev
  • trans_desc: Pointer to variable able to contain a pointer to the description of the transaction that is executed
  • ticks_to_wait: Ticks to wait until there’s a returned item; use portMAX_DELAY to never time out.

esp_err_t spi_device_transmit(spi_device_handle_t handle, spi_transaction_t *trans_desc)

Do a SPI transaction.

Essentially does the same as spi_device_queue_trans followed by spi_device_get_trans_result. Do not use this when there is still a transaction queued that hasn’t been finalized using spi_device_get_trans_result.

Return
  • ESP_ERR_INVALID_ARG if parameter is invalid
  • ESP_OK on success
Parameters
  • handle: Device handle obtained using spi_host_add_dev
  • trans_desc: Pointer to variable able to contain a pointer to the description of the transaction that is executed